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    • 专利摘要:
    manipulation of temporary non-volatile data. the present invention relates to systems and methods that are provided for handling temporary data that are stored in a non-volatile memory, such as nand flash memory. temporary data can include hibernation data or any other data needed for just one electronic device boot cycle. when storing temporary data on one or more pages of non-volatile memory, the electronic device can store a temporary marker as part of the metadata on at least one of the pages. this way, at the next startup of the electronic device, the electronic device can use the temporary tick to determine that the associated page contains unnecessary data. the device may therefore invalidate the page and omit the page from its metadata table.
    公开号:BR102012017717B1
    申请号:R102012017717-0
    申请日:2012-07-18
    公开日:2020-09-15
    发明作者:Nir J. Wakrat；Daniel J. Post
    申请人:Apple Inc；
    IPC主号:
    专利说明:

    BACKGROUND OF THE REVELATION
    [0001] The present invention relates to NAND flash memory, as well as other types of non-volatile memories ("NVMs"), which are commonly used in electronic devices for mass storage. For example, consumer electronics, such as portable media players, often include NAND flash memory to store music, videos, and other media programs. These data are typically intended to be stored for long periods of time, such as on the order of days, months, or even years.
    [0002] NVMs can also be used in electronic devices for purposes other than long-term storage. For example, the electronic device can temporarily store data from volatile memory in an NVM to enable the volatile memory to shut down during a period of reduced power, hibernation without losing data. As other examples, an NVM can be used in virtual memory schemes to increase the apparent size of the electronic device's volatile memory. SUMMARY OF THE REVELATION
    [0003] Systems and methods for processing data intended for short-term storage in non-volatile memory, such as flash memory, are provided. By allowing short-term storage to be handled differently from long-term data, the efficiency and effectiveness of an NVM's memory management can be increased.
    [0004] Short-term storage may include storing data in an NVM that is needed only during a current instance of an operating system, and is no longer useful once the electronic device is turned off or rebooted (or even earlier) . This data can be referred to as "temporary non-volatile data" or "temporary NV data," since the data is needed temporarily, but is stored in a persistent non-volatile medium. Temporary NV data can include, for example, hardware-based hibernation data, application-generated data, application-based hibernation data, swap files, and other temporary files.
    [0005] In some embodiments, when storing temporary NV data, the electronic device can decorate the temporary NV data with a temporary marker. For example, for each NVM page where the electronic device stores temporary NV data, the electronic device can include a temporary marker in the page's metadata. Alternatively, the electronic device may provide a temporary marker on at least one page of an NV temporary data storage block. This allows the electronic device to distinguish the temporary NV data from the required information through multiple device initializations.
    [0006] During the initialization of the electronic device, the electronic device can be configured to perform various initialization procedures, such as building the metadata table. The metadata table can include, for example, a table that indicates which logical addresses issued by the file system (for example, logical block addresses ("LBAs")) are currently allocated and / or a logical to physical address map. The electronic device can create the metadata table by scanning through the NVM pages and determine whether each page includes a temporary marker (ie if each page is in a marked block to store temporary NV data). If a page includes a temporary marker, the data included on the page was useful only in the previous initialization of the electronic device and is not necessary in the current initialization. Therefore, the electronic device can mark the page as having invalid data and omit the page (and its stored metadata) from the metadata table. By performing these cleaning operations at startup, the electronic device can guarantee efficient use of the NVM memory locations from the beginning. That is, at no point during the current initialization cycle will the electronic device perform unnecessary operations during area cleaning or leveling of use to keep temporary NV data obsolete.
    [0007] In some modalities, the electronic device can select memory locations and / or programming techniques to store data based on whether the data is temporary NV data. For example, the electronic device can select lower-performing memory locations, such as less reliable pages or blocks (for example, heavily used blocks), to store temporary NV data. In some embodiments, the electronic device may select memory locations or higher speed programming techniques to store temporary NV data, such as single-level cell blocks ("SLC"). BRIEF DESCRIPTION OF THE FIGURES
    [0008] The aspects and advantages of the invention described above and others and others will be evident as a result of the evaluation of the detailed description below, taken in conjunction with the attached drawings, in which similar characters refer to similar parts throughout the figures, and wherein: Figure 1 is a block diagram of an illustrative electronic device that has a non-volatile memory configured in accordance with various embodiments of the invention; Figures 2 and 3 are graphical representations of illustrative non-volatile memory locations that store temporary non-volatile data according to various embodiments of the invention; Figure 4 is a flow chart of an illustrative process for decorating temporary non-volatile data in a non-volatile memory with a temporary marker according to various embodiments of the invention; and Figure 5 is a flow chart of an illustrative process for processing temporary non-volatile data at the startup of an electronic device according to various embodiments of the invention. DETAILED DESCRIPTION
    [0009] Figure 1 is a block diagram of illustrative electronic device 100. In some embodiments, electronic device 100 may be or may include a portable media player (for example, an iPod ™ made available by Apple Inc. of Cupertino, CA), a cell phone (for example, an iPhone ™ made available by Apple Inc.), a personal pocket computer, a personal digital assistant ("PDA"), a desktop computer, a portable computer, and any other types of suitable electronic device or system.
    [00010] Electronic device 100 may include system in a chip of microcircuits ("SoC") 110 and non-volatile memory ("NVM") 120.
    [00011] The NVM 120 can include NAND flash memory based on floating door technology or charge trapping, NOR flash memory, programmable and erasable read-only memory ("EPROM"), programmable read-only memory and electrically erasable ("EEPROM"), Ferroelectric RAM ("FRAM"), magneto resistive RAM ("MRAM"), or any combination thereof.
    [00012] NVM 120 can be organized in "blocks", which is the smallest erasable unit, and additionally organized in "pages," which can be the smallest unit that can be programmed or read. In some embodiments, the NVM 120 can include multiple integrated circuits, where each integrated circuit can have multiple blocks. The corresponding integrated circuit blocks (for example, blocks that have the same position or block number) can form logical units referred to as "superblocks." Each memory location (for example, page or block) of the NVM 120 can be addressed using a physical address (for example, a physical page address or physical block address). Although only one NVM is shown in figure 1, electronic device 100 may alternatively include multiple NVM Packs.
    [00013] The system in a microcircuit chip 110 can include control circuitry 112, memory 114, and NVM interface 116. Control circuitry 112 can control the general operations and functions of SoC 110 and electronic device 100 generally. The control circuitry 112 may include any suitable components, circuitry, or logic, such as one or more processors. The control circuitry 112 can operate under the control of a program, such as an application, operating system, or an NVM controller (e.g., NVM controller 117) loaded into memory 114.
    [00014] Memory 114 may include any suitable types of volatile memory, such as random access memory ("RAM") (for example, static RAM ("SRAM"), dynamic random access memory ("DRAM"), memory synchronous dynamic random access ("SDRAM"), double data rate RAM ("DDR")), reserve memory (cache), or any combination thereof. In some embodiments, memory 114 can act as the main memory for any processors implemented as part of the control circuitry 112. In these and other embodiments, memory 114 can store data that can also be stored, at one point or another ( ie concurrently or at different times), on NVM 120 as temporary NV data. As described above, temporary NV data includes data stored in an NVM that is needed only during a current instance of the operating system, and is no longer useful once electronic device 100 is turned off or reset (or earlier).
    [00015] For example, memory 114 and / or NVM 120 can store temporary NV data in the form of hardware-based hibernation data. Hardware-based hibernation data can include data transferred from memory 114 to NVM 120 responsive to entering a hardware-based hibernation state (e.g., a reduced power state in which memory 114 is turned off). Therefore, hardware-based hibernation data may include data that enables electronic device 100 to return to its prehibernation operational state (for example, the state it was in before the reduced energy state entered) when it wakes up from hibernation. Hardware-based hibernation data can represent the device's current operating states for both hardware and software. For example, device state data can specify which programs are actively running, or more specifically, which media resource (for example, music) is being played, or the position within which the graphical user interface the user is currently accessing. . Because a user cannot wait for the electronic device 100 to return to its pre-hibernate operational state the user can turn off the electronic device 100 during hardware hibernation, this hardware-based hibernation data is an example of NV temporary data.
    [00016] In some embodiments, memory 114 and / or NVM 120 can store data generated by the application as temporary NV data. Application generated data can include any temporarily useful data associated with or generated by an application, such as data that belongs to a current game in a game application. In some embodiments, the application may provide an indication to the operating system and file system of the temporary nature of the data generated by the application so that this data can ultimately be stored as temporary NV data in NVM 120.
    [00017] In some scenarios, memory 114 and / or NVM 120 can be used to store temporary NV data in the form of application-based hibernation data. Application-based hibernation data may include data, such as application-generated data, transferred from memory 114 to NVM 120 responsive to a particular application or program entering a state of hibernation. Electronic device 100 can select the application for hibernation to free up memory space 114 when space is running out and the application is not being actively used. Therefore, application-based hibernation data may include data that enables electronic device 100 to return a hibernated application back to its pre-hibernate operational state. Due to a user not waiting for the hibernating application to return to its exact previous state if the electronic device 100 has been reset, application-based hibernation data is another example of NV temporary data.
    [00018] In these and other scenarios, memory 114 and / or NVM 120 can be used to store temporary NV data in connection with virtual memory schemes. For example, application-generated data, application-based hibernation data, or any other data used by one or more applications can be transferred from memory 114 to an "exchange file" or "page file" in NVM 120. Here , data can be paged out of memory 114 into a file stored in NVM 120, thereby freeing up space in memory 114 when space is needed. Other types of files used in virtual memory schemes to transport temporary NV data between memory 114 and NVM 120 can also be contemplated. Because the data used in the virtual memory scheme is generally not needed since the electronic device 100 is turned off, a swap file is another example of temporary NV data.
    [00019] Memory 114 and / or NVM 120 can store temporary NV data of any other suitable types, such as any data typically stored in a "temporary file" on UNIX-based systems. For example, temporary NV data may include data stored in temporary files on NVM 120 that a program or application creates to pass data to another program or application. As another example, temporary NV data may include short-term data stored in temporary files on NVM 120 that are too large to fit in memory 114 or take more than a predetermined amount of memory space 114.
    [00020] To enable the SoC 110 components (such as memory 114) to pass information to and from the NVM 120, the SoC 110 can include the NVM 116 interface. The NVM 116 interface can include any suitable combination of hardware, software , and firmware configured to act as an interface or controller between the NVM 120 and the specific non-NVM components of the SoC 110. For example, the NVM 116 interface may include NVM 117 controller to provide a software / firmware interface that provides the operating system and file system indirect access to NVM 120, thereby allowing the operating system and file system to issue read or write requests to store or retrieve temporary NV data on or NVM 120. The NVM 116 interface can additionally include bus controller 118, which can include any suitable hardware components that enable the NVM 117 controller to access NVM 120 using bus specifications NVM 120 (for example, data rate).
    [00021] The NVM 116 interface can perform various tasks to manage NVM 120 memory locations, such as cleaning areas, leveling usage, and poor block management. The NVM 117 controller can be configured to maintain or generate "metadata," which can be any memory management data used by the NVM 117 controller to manage the NVM 120 and the memory locations within it. The NVM 117 controller can be configured to maintain table or metadata mappings, such as a table that indicates which logical addresses issued by the file system (for example, logical block addresses ("LBAs")) are currently allocated for use and / or a mapping between logical addresses and physical addresses of NVM 120. Logical addresses are issued by the file system in read or write requests, which the NVM 170 controller can map to different physical addresses that actually correspond to physical memory locations of the NVM 120. The NVM 117 controller can, therefore, keep the metadata table in order to properly handle read and write requests from the file system.
    [00022] The NVM 116 interface is represented in figure 1 as being implemented completely in SoC 110. In some modalities, some of the components of the NVM 116 interface, as well as some of the functionality of the NVM 117 controller, can be implemented and executed by a separate memory controller (eg flash controller) included, for example, in the NVM 120. Therefore, it should be understood that any NVM 116 interface descriptions or NVM-related functionality are not limited to components or actions performed in the SoC 110.
    [00023] The NVM 116 interface can receive file system write requests to store any of a variety of data types. For example, the file system can instruct the NVM 116 interface to store media assets, such as music and videos, for an indefinite period of time. In other scenarios, the file system can instruct the NVM 116 interface to store temporary NV data, such as hardware-based hibernation data, application-generated data, application-based hibernation data, swap files, or other temporary files , in NVM 120. Due to temporary NV data having a different expected lifespan (ie, an electronic device boot cycle 100) than other forms of data (ie, more than an electronic device boot cycle 100), the NVM 116 interface can be configured to handle temporary NV data in a different way that can increase the memory usage efficiency and efficiency in NVM 120.
    [00024] In some embodiments, the NVM 116 interface can select memory locations (ie pages, blocks, or superblocks) in which to store data based on whether the data is temporary data. For example, the NVM 116 interface can select lower performance memory locations to store temporary NV data. Low-performance memory locations may be less reliable pages or blocks, such as frequently used blocks (that is, blocks that have gone through more erase cycles and therefore may have suffered more deterioration). The NVM 116 interface can select higher performance memory locations to store non-temporary data, as it is expected that temporary data will not be kept on the NVM 120 for a longer period of time.
    [00025] In some modalities, the NVM 116 interface can select memory locations or higher speed programming techniques to store temporary NV data. In this way, the delay between data transfer between memory 114 and NVM 120 is reduced, which can be beneficial for virtual memory schemes, when entering a reduced power hibernation mode, or in a variety of other situations. To improve speed, the NVM 116 interface can select single level cell blocks ("SLC") or can reduce the resolution adjustment when programming the blocks with temporary NV data. The NVM 116 interface can choose SLC blocks to increase programming speed while also improving reliability.
    [00026] In some embodiments, the NVM 116 interface can handle temporary NV data differently from other data by decorating temporary NV data with a "temporary marker" when storing NV temporary data in NVM 120. This way, when data is read from back out of NVM 120, the NVM 116 interface can quickly and efficiently differentiate temporary NV data with other information intended to be stored for a longer period of time.
    [00027] Figure 2 illustrates a way in which the NVM 116 interface can decorate the temporary NV data with a temporary marker. Figure 2 is a graphical representation of the pages in a non-volatile memory block, such as NVM 120 in Figure 1. As illustrated, each page in the block can be used to store a data field and an associated metadata field. Each data field can store any suitable data type, such as temporary NV data or any data that the file system requests to be stored (for example, media assets). The metadata fields on the same page can store metadata associated with the data in the data field, such as any memory management data received or generated by the NVM 117 controller, including error correction code ("ECC") data, any information used to manage the mapping between physical and logical addresses (for example, an LBA), and the like.
    [00028] The metadata field can include space to store a marker that indicates whether the data in the data field is temporary NV data. For example, the "T" (or "temporary") markers in the metadata fields on pages 1 and 2 in figure 2 indicate that the associated data fields include temporary NV data, while the "P" (or "persistent") markers in the metadata fields on page 0 and the last page of the block indicate that the data in the associated data fields includes data intended for longer-term persistent storage. The temporary marker "T" and the persistent marker "P" can be implemented using any suitable approach. That is, these markers can include any suitable amount of bits (for example, one or more bits) and the actual or word values of the "T" and "P" markers can each assume any suitable predetermined bit pattern.
    [00029] In some embodiments, the NVM 116 interface may not use a specific "P" marker, and may instead use only temporary "T" markers to indicate where temporary NV data is stored in NVM 120. In these modalities, on reading back a page, the NVM 116 interface can determine that the page data field does not contain temporary NV data based on the lack of a temporary marker in the metadata field.
    [00030] Figure 2 provides an example where the same block can include both temporary NV data as well as persistent data. In other embodiments, such as the embodiment illustrated in Figure 3, an entire block or superblock can be used to store either temporary NV data or persistent data.
    [00031] Figure 3 is a graphical representation of multiple blocks through different integrated circuits of a non-volatile memory, such as NVM 120 in figure 1. Each column represents a different integrated circuit and each line represents a different superblock. Therefore, as illustrated in the first integrated circuit ("IC 0"), an entire block (ie, block 2) can be used to store temporary NV data. In some embodiments, the NVM 116 interface can provide a temporary marker on every page of the used block, which can provide extra assurance that the NVM 116 interface can correctly interpret this block as storing temporary NV data. In other embodiments, the NVM 116 interface can store temporary bookmarks in a subset of the pages in the block. For example, the NVM 116 interface can store a temporary marker only on the first page of the block so that the NVM 116 interface can later determine whether the block contains temporary NV data when reading the block from the first page to the last page . Alternatively, the NVM 116 interface can store a temporary marker only on the last page (so the NVM 116 interface can later read the block from the last page to the first page), or the NVM 116 interface can store temporary markers both on the first page as the last pages of the block.
    [00032] In some embodiments, the NVM 116 interface can select an entire superblock for use in NV temporary data storage. This is illustrated in the fifth superblock ("SUPERBLOCK 4") in figure 3, where all blocks in the superblock can be used to store temporary NV data. As with the single block case, the NVM 116 interface may or may not store temporary bookmarks on all used pages of the superblock. Instead, the NVM 116 interface can store temporary bookmarks only on the first page of each block in the superblock, only on the last page of each block in the superblock, both on the first and the last pages of each block, or on one or more pages of a subset of the blocks in the superblock.
    [00033] Although not shown in the figure to preserve clarity, blocks that do not include temporary "T" markers may (or may not) include persistent "P" markers on some or all of the pages. In addition, although five integrated circuits and six superblocks (for a total of 30 blocks) are illustrated, it should be understood that the NVM 120 can include any other suitable number of integrated circuits and superblocks.
    [00034] The NVM 116 interface can use temporary markers to decorate temporary NV data to process temporary NV data differently from other data types. For example, temporary markers can affect the initialization process of electronic device 100. As a result of initialization of electronic device 100, NVM 117 controller can perform a series of initialization procedures so that NVM 117 controller can properly determine the current state of NVM 120. The initialization procedures may include the reconstruction of one or more tables or metadata maps, such as the table indicating which logical addresses are being used and the logical to physical address mapping.
    [00035] To reconstruct the tables, the NVM 117 controller can read each page of NVM 120 and, for each page, it can determine whether to include the page in the tables. If the NVM 117 controller determines that the page is designated with a temporary marker (or is in a block or superblock currently designated with temporary markers), the NVM 117 controller can leave the page out of the tables. This is because the page was used to store temporary NV data, which was only valid during the previous initialization of the electronic device 100. Therefore, the NVM 117 controller can mark the page as invalid so that, at some appropriate time, the page can be released (for example, during area cleaning or leveling usage) and used to store other information. Since the NVM 117 controller invalidates the page and omits it from the tables at the time of initialization, the memory usage of the NVM 120 can be made efficient immediately. That is, at no point during the current boot cycle will the NVM 117 controller perform unnecessary operations during area cleaning or usage leveling to keep temporary NV data now obsolete.
    [00036] Referring now to Figures 4 and 5, flowcharts of illustrative processes are shown according to various embodiments of the invention. The steps of these illustrative processes can be performed by any suitable component or combination of components in an electronic device, such as by a set of control circuits 112 (figure 1) operating under the control of the NVM 117 controller (figure 1).
    [00037] Looking at figure 4 first, process 400 is shown to decorate temporary NV data with a temporary marker when storing temporary NV data in an NVM, such as NVM 120 (figure 1). Process 400 can start at step 402, where the file system can decide to store data in the NVM. For temporary NV data, this can occur, for example, when the volatile memory is running out of space or when the volatile memory needs to be turned off in a reduced power state (ie, hibernate state).
    [00038] In step 404, data can be provided from the file system to the NVM interface (for example, an NVM controller) for storage in the NVM. Then, in step 406, the NVM interface can determine whether this data is temporary data that can be stored as temporary NV data. In some embodiments, the NVM interface can interpret whether the data is temporary data based on the recording request received from the file system. The file system may have issued a write request signaling that the data is temporary data in response to an indication from an application.
    [00039] If, in step 406, the NVM interface determines that the data is temporary NV data, the NVM interface can prepare metadata for the data in step 408, where the metadata includes a temporary marker. The preparation of metadata in step 408 (or step 412, discussed below) may include determining and maintaining a mapping from a logical address (received with the write request) to a physical address associated with the NVM. The NVM interface can also select, in step 410, memory locations (that is, pages, blocks, or superblocks) or programming techniques with lower performance and / or higher speed to store the data, since it is expected that the data has a non-volatile memory lifetime. For example, the NVM interface can select less reliable blocks (for example, heavily used blocks) or SLC blocks in which to store the data.
    [00040] Otherwise, if the NVM interface determines in step 406 that the data is not temporary NV data, the NVM interface can prepare metadata that does not include a temporary marker (and may instead include a persistent marker) in the step 412. In this case, because the data can be stored long-term in non-volatile memory, the NVM interface can select memory locations or programming techniques for higher performance and / or lower speed to store the data in step 414. For example, the NVM interface can select more reliable blocks or MLC blocks in which to store the data.
    [00041] From step 410 or step 414, process 400 can continue to step 416, where the NVM interface can store data (whether it is temporary NV data or other data) and at least some of its associated metadata in one or more selected NVM pages. Process 400 can then end at step 418.
    [00042] Moving now to figure 5, process 500 is shown for processing the temporary NV data at the startup of an electronic device. Process 500 can start at step 502 at the initialization of the electronic device. In step 504, an NVM interface can perform various initialization procedures so that the NVM interface can determine the NVM's initial state and its memory locations. Initialization procedures can therefore include building metadata tables, such as a table that indicates which logical addresses are allocated for use and / or a mapping of logical to physical addresses for each NVM page that contains valid data.
    [00043] From step 504, the NVM interface can prepare the tables by scanning and processing each page of the NVM. In particular, in step 506, the NVM interface can read a first page of the NVM, and in step 508, the NVM interface can determine whether this first page includes a temporary marker in the page's metadata field. If not, the first page does not include temporary NV data, so in step 510, the NVM interface can add the page to the tables. For example, the NVM interface can determine (for example, from metadata fields) the logical address associated with the page and can add the logical to physical address mapping of the page to the appropriate table, or the NVM interface can indicate in a table that the logical address is currently allocated by the file system.
    [00044] If, at step 508, the NVM interface determines instead that the page includes a temporary marker in the page's metadata field, process 500 can continue to step 512. Due to the temporary marker indicating that the page stores temporary NV data, which is no longer valid now that the electronic device has been rebooted, process 500 can proceed to step 512. In step 512, the NVM interface can ignore the metadata on the page for purposes of rebuilding the metadata table. For example, although a logical address stored on the page should otherwise have indicated that the logical address is being used by the file system, the NVM interface can ignore the presence of the logical address on the page. Then, in step 514, the NVM interface can mark the page as containing invalid data. This can allow the NVM interface, at the appropriate time, to perform area cleaning on the page to free up space to store other information.
    [00045] From step 510 or step 514, process 500 can continue to step 516, where the NVM interface can determine whether metadata tables are being built. This determination may involve determining whether there are additional pages that have not yet been read and processed. If there are additional pages that should be considered for inclusion in the metadata table, process 500 can return to step 506 so that the NVM interface can read another NVM page. Otherwise, if there are no additional pages, process 500 can end at step 518.
    [00046] It should be understood that the steps of processes 400 and 500 of figures 4 and 5, respectively, are merely illustrative. Any of the steps can be modified, removed, or combined, and additional steps can be included, without departing from the scope of the invention.
    [00047] The described modalities of the invention are presented for the purpose of illustration and not limitation.
    权利要求:
    Claims (16)
    [0001]
    1. An electronic device (100) comprising: a volatile memory (114) for storing data generated by applications associated with at least one application that is operating in a pre-hibernation state; a non-volatile memory ("NVM") (120) comprising a plurality of pages; characterized by the fact that the electronic device further comprises a set of control circuits (112) operational to: receive an indication that an application operating in the pre-hibernate state is entering a hibernate state; and store the data generated by the application associated with the application entering hibernation as temporary non-volatile data (NV) in non-volatile memory (120), where the control circuitry (112) stores a temporary marker (T) on at least one of the pages on which the temporary NV data is stored, where the temporary NV data comprises data that is no longer useful after the electronic device (100) is turned off or restarted, and where the data generated by the application comprises data that allow the app to return from hibernation to prehibernation.
    [0002]
    2. Electronic device (100), according to claim 1, characterized by the fact that the electronic device (100) is additionally operational to: prepare metadata for temporary NV data; and store the metadata and temporary marker (T) in a metadata field on at least one of the pages on which the temporary NV data is stored.
    [0003]
    3. Electronic device (100) according to claim 1, characterized by the fact that the temporary marker (T) comprises a predetermined bit pattern.
    [0004]
    4. Electronic device (100), according to claim 1, characterized by the fact that the plurality of pages is organized in blocks, and in which the set of control circuits (112) is additionally operational to: select one of the blocks to store temporary data; and store the temporary marker (T) on at least one page of the selected block.
    [0005]
    5. Electronic device (100), according to claim 4, characterized by the fact that the set of control circuits (112) is additionally operational to store a temporary marker (T) on all pages of the selected block.
    [0006]
    6. Electronic device (100), according to claim 1, characterized by the fact that the control circuitry (112) is additionally operational to: identify that the volatile memory is in a low memory state; and storing the temporary data in the non-volatile memory (120) responsive to the identification of the low memory state.
    [0007]
    7. Electronic device (100), according to claim 1, characterized by the fact that the set of control circuits (112) is additionally operational to select pages of lower performance to store temporary data.
    [0008]
    8. Electronic device (100), according to claim 1, characterized by the fact that the set of control circuits (112) is additionally operational to select a higher speed programming technique to store the temporary data.
    [0009]
    9. Method for storing data in a non-volatile memory (120), in which the non-volatile memory (120) comprises a plurality of pages, the method comprising the steps of: storing, in volatile memory (114), data generated by the application associated with an application that operates in a pre-hibernate state; characterized by the fact that it further comprises: receiving an indication that the application operating in the pre-hibernation state is entering a hibernation state; and store, in the non-volatile memory (120), the data generated by the application associated with the application that enters the hibernation state as temporary data NV in the non-volatile memory (114), in which a set of control circuits (112) stores a temporary marker (T) on at least one of the pages on which the temporary NV data is stored and where the temporary NV data comprises data that is no longer useful since the electronic device (100) is switched off or reset, and where the data generated by the application comprises data that allows the application to return from hibernation back to pre-hibernation.
    [0010]
    10. Method, according to claim 9, characterized by the fact that it further comprises: preparing metadata for temporary NV data; and store the metadata and temporary marker (T) in a metadata field on at least one of the pages on which the temporary NV data is stored.
    [0011]
    11. Method according to claim 9, characterized in that the temporary marker (T) comprises a predetermined bit pattern.
    [0012]
    12. Method, according to claim 9, characterized by the fact that the plurality of pages is organized in blocks, the method further comprising: selecting one of the blocks to store the temporary NV data; and store a temporary marker (T) on at least one page of the selected block.
    [0013]
    13. Method, according to claim 12, characterized by the fact that it also comprises storing a temporary marker (T) on all pages of the selected block.
    [0014]
    14. Method, according to claim 9, characterized by the fact that it further comprises: identifying that the volatile memory (114) is in a low memory state; and store the temporary NV data in non-volatile memory, in order to identify the low memory state.
    [0015]
    15. Method, according to claim 9, characterized by the fact that it also comprises selecting lower-performing pages to store the temporary NV data.
    [0016]
    16. Method, according to claim 9, characterized by the fact that it also comprises selecting a high-speed programming technique to store the temporary NV data.
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    BR112014009915B1|2021-06-15|METHOD FOR ALLOCATION OF MEMORY, DEVICE AND NON TRANSIENT MACHINE-READABLE STORAGE MEANS
    US20140013034A1|2014-01-09|Nonvolatile random access memory and data management method
    TWI625626B|2018-06-01|Methods and systsems for managing physical information of memory units in a memory device
    WO2017152392A1|2017-09-14|Flash memory device refreshing method and apparatus
    KR20210038692A|2021-04-07|Multi-level wear leveling for nonvolatile memory
    US11100005B2|2021-08-24|Logical-to-physical | table sharping strategy
    US20190286325A1|2019-09-19|Volatility management for memory device
    US20220027085A1|2022-01-27|Storage traffic pattern detection in memory devices
    US10846213B2|2020-11-24|Memory device and method of operating the same
    CN112835816A|2021-05-25|Read command based on row state prediction
    同族专利:
    公开号 | 公开日
    US20130024600A1|2013-01-24|
    CN102890620A|2013-01-23|
    EP2549385B1|2015-06-10|
    EP2549385A1|2013-01-23|
    TW201324146A|2013-06-16|
    AU2012205187B2|2014-10-16|
    KR101385789B1|2014-04-16|
    KR101818599B1|2018-01-15|
    JP5683023B2|2015-03-11|
    BR102012017717A2|2013-07-30|
    TWI573019B|2017-03-01|
    TW201329713A|2013-07-16|
    CN102890620B|2016-05-18|
    US8949508B2|2015-02-03|
    KR20130010449A|2013-01-28|
    KR20130010447A|2013-01-28|
    JP2013033482A|2013-02-14|
    TWI519952B|2016-02-01|
    WO2013012632A1|2013-01-24|
    AU2012205187A1|2013-01-31|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US9024A|1852-06-15|Motion of the lay in looms |
    US8010A|1851-04-01|Peter mckinlay |
    JP3106401B2|1993-07-26|2000-11-06|インターナショナル・ビジネス・マシーンズ・コーポレ−ション|Information processing system|
    JPH11242631A|1998-02-26|1999-09-07|Toshiba Corp|Computer system and data preserving/restoring method for the same|
    US6209088B1|1998-09-21|2001-03-27|Microsoft Corporation|Computer hibernation implemented by a computer operating system|
    US6574717B1|2001-05-31|2003-06-03|Oracle Corporation|Techniques for time-based retention of a reusable resource|
    US7467274B2|2001-12-31|2008-12-16|Hewlett-Packard Development Company, L.P.|Method to increase the life span of limited cycle read/write media|
    US7082495B2|2002-06-27|2006-07-25|Microsoft Corporation|Method and apparatus to reduce power consumption and improve read/write performance of hard disk drives using non-volatile memory|
    JP3994071B2|2003-06-12|2007-10-17|インターナショナル・ビジネス・マシーンズ・コーポレーション|Computer apparatus, system operating state switching control method, and program|
    US7093089B2|2003-08-18|2006-08-15|Hewlett-Packard Development Company, Lp.|Systems and methods for storing data on computer systems|
    GB0320142D0|2003-08-28|2003-10-01|Ibm|Data storage systems|
    JP4688584B2|2005-06-21|2011-05-25|株式会社日立製作所|Storage device|
    US20070234028A1|2005-09-15|2007-10-04|Rothman Michael A|Method and apparatus for quickly changing the power state of a data processing system|
    KR100843543B1|2006-10-25|2008-07-04|삼성전자주식회사|System comprising flash memory device and data recovery method thereof|
    US20100049775A1|2007-04-26|2010-02-25|Hewlett-Packard Development Company, L.P.|Method and System for Allocating Memory in a Computing Environment|
    US8239639B2|2007-06-08|2012-08-07|Sandisk Technologies Inc.|Method and apparatus for providing data type and host file information to a mass storage system|
    US8214343B2|2008-03-19|2012-07-03|Microsoft Corporation|Purposing persistent data through hardware metadata tagging|
    DE102008062934A1|2008-12-23|2010-06-24|Kuka Roboter Gmbh|Networked industrial controller and method for changing the operating mode of such an industrial controller|
    US20100169540A1|2008-12-30|2010-07-01|Sinclair Alan W|Method and apparatus for relocating selected data between flash partitions in a memory device|
    US9098396B2|2009-02-13|2015-08-04|Sandisk Il Ltd.|Enhancement of efficiency in power failure handling in flash memory|
    US8380676B1|2009-05-27|2013-02-19|Google Inc.|Automatic deletion of temporary files|
    US20100325351A1|2009-06-12|2010-12-23|Bennett Jon C R|Memory system having persistent garbage collection|
    US8688894B2|2009-09-03|2014-04-01|Pioneer Chip Technology Ltd.|Page based management of flash storage|
    WO2011031796A2|2009-09-08|2011-03-17|Fusion-Io, Inc.|Apparatus, system, and method for caching data on a solid-state storage device|
    US9063886B2|2009-09-18|2015-06-23|Apple Inc.|Metadata redundancy schemes for non-volatile memories|
    US8296506B2|2009-11-09|2012-10-23|Lite-On It Corporation|Method for managing a non-violate memory and computer readable medium thereof|
    US8694814B1|2010-01-10|2014-04-08|Apple Inc.|Reuse of host hibernation storage space by memory controller|
    KR101678911B1|2010-03-12|2016-11-23|삼성전자주식회사|Data storage device and computing system including the same|
    US8949508B2|2011-07-18|2015-02-03|Apple Inc.|Non-volatile temporary data handling|US8949508B2|2011-07-18|2015-02-03|Apple Inc.|Non-volatile temporary data handling|
    KR101596606B1|2011-08-19|2016-03-07|가부시끼가이샤 도시바|Information processing apparatus, method for controlling information processing apparatus, non-transitory recording medium storing control tool, host device, non-transitory recording medium storing performance evaluation tool, and performance evaluation method for external memory device|
    US20130124778A1|2011-11-10|2013-05-16|Greenliant Llc|Method of storing host data and meta data in a nand memory, a memory controller and a memory system|
    KR102093104B1|2013-02-22|2020-03-25|주식회사 쿠라레|Fiber, fabric and nonwoven fabric|
    US10528116B2|2013-03-14|2020-01-07|Seagate Technology Llc|Fast resume from hibernate|
    CN107391389B|2013-08-05|2020-11-24|慧荣科技股份有限公司|Method for managing a memory device, memory device and controller|
    CN104346292B|2013-08-05|2017-10-24|慧荣科技股份有限公司|For managing method, memory storage and the controller of a memory storage|
    US10140477B2|2013-12-09|2018-11-27|Thales E-Security, Inc.|Obfuscating in memory encryption keys|
    CN108536611A|2017-03-03|2018-09-14|西部数据技术公司|Wear leveling in nonvolatile memory|
    FR3046266A1|2015-12-28|2017-06-30|Proton World Int Nv|STORAGE IN A FLASH MEMORY|
    US9990023B2|2016-03-28|2018-06-05|Apple Inc.|Systems and methods for handling sudden power failures in solid state drives|
    CN106569744B|2016-10-31|2020-07-14|华为数字技术（成都）有限公司|Method for storing temporary data and storage device|
    US10705918B1|2017-07-21|2020-07-07|EMC IP Holding Company LLC|Online metadata backup consistency check|
    US10956052B1|2017-07-21|2021-03-23|EMC IP Holding Company LLC|Online address to hashmetadata scanner|
    US10515701B1|2017-10-31|2019-12-24|Pure Storage, Inc.|Overlapping raid groups|
    CN108304280A|2018-01-30|2018-07-20|郑州云海信息技术有限公司|Control method, BMC and the device of isomery mixing memory system abnormal restoring|
    US10446254B1|2018-05-03|2019-10-15|Western Digital Technologies, Inc.|Method for maximizing power efficiency in memory interface block|
    US10936456B1|2019-02-20|2021-03-02|Apple Inc.|Handling malfunction in a memory system comprising a nonvolatile memory by monitoring bad-block patterns|
    US11216388B2|2019-04-30|2022-01-04|EMC IP Holding Company LLC|Tiering between storage media in a content aware storage system|
    JP6874814B2|2019-10-30|2021-05-19|株式会社安川電機|Industrial equipment control device, industrial equipment control device setting system, industrial equipment control device setting method, and program|
    法律状态:
    2013-07-30| B03A| Publication of a patent application or of a certificate of addition of invention [chapter 3.1 patent gazette]|
    2018-12-11| B06F| Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]|
    2019-10-22| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|
    2020-04-28| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|
    2020-09-15| B16A| Patent or certificate of addition of invention granted|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 18/07/2012, OBSERVADAS AS CONDICOES LEGAIS. |
    优先权:
    申请号 | 申请日 | 专利标题
    US13/184,647|2011-07-18|
    US13/184,647|US8949508B2|2011-07-18|2011-07-18|Non-volatile temporary data handling|
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